Using Hardware-in-the-Loop (HIL) for Rapid Simulation with AMD Adaptive SoCs

Опубликовано 15 апреля 2026, 16:00

Learn how Hardware-in-the-Loop (HIL) accelerates simulation and validation for AMD Adaptive SoC designs. This video introduces the Vitis™ Subsystem (VSS) flow and shows how AI Engine, HLS, and RTL kernels are integrated into a unified system. Step-by-step to set up and run HIL workflows to enable rapid testing, improve design verification, and streamline development of complex hardware-accelerated applications.

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