Simulate & Eliminate - A Design Methodology for Application Specific, Multi-Core Architectures

Опубликовано 17 августа 2016, 21:06

Processor specialization is a prevalent trend in computing. This started with digital signal processors and has since moved to application domains including networking, wireless communication, audio and vision. These processors are typically developed for embedded computing systems, which have stringent constraints on performance. Achieving the desired requirements demands careful tuning of the underlying architecture. This talk describes our tool, Simulate & Eliminate (S&E), which produces synthesizable HDL for application specific, multi-core architectures. S&E employs a novel top-to-bottom design methodology to generate correct-by-construction and cycle-accurate multi-core architectures for a given application. The top-to-bottom design methodology provides simplicity (through the use of a simple tool chain and programming model), flexibility (through the capability of using different specification languages as well as different parameterization options), scalability (through the ability to handle complex applications) and power/energy efficiency (through the use of clock and power gating and power and frequency scaling). S&E starts from a fully connected, general purpose, multi-core architecture and pares away unneeded functionality to create an application specific, multi-core architecture. This not only removes unneeded functional units, but also unnecessary interconnect, control logic and memory. We show that there are substantial opportunities to eliminate unneeded functionality and create an application specific architecture for executing a specific (set of) application(s). We focus the design of our tool on digital signal processing applications, such as real-time vision, acoustic and radio frequency communication; however, our tool is broadly applicable to any application.