Software- Assisted Hardware Reliability

Опубликовано 17 августа 2016, 21:31

In the era of nanoscale technology scaling, we are facing the limits of physics, challenging robust and reliable microprocessor design and fabrication. As these trends continue, guaranteeing correctness of execution using traditional circuit-level solutions is becoming prohibitively expensive and impractical. This talk demonstrates the benefits of abstracting circuit-level challenges to the higher layers of execution, specifically the run-time architecture and software stack. Reliability challenges are broadly classified into process, voltage, and thermal (PVT) variations. Discussing and evaluating hardware-software co-design to mitigate voltage variation, I demonstrate that such an approach is not only sustainable in the long run, but also cost-effective, specifically in the commodity microprocessor market segment.