Reconfigurable Computing: Architectural and Design Tool Challenges

Опубликовано 6 сентября 2016, 17:20

Although reconfigurable computing promises huge performance benefits for a wide range of different applications, there are many factors that have limited its effectiveness so far. Perhaps most concerning, current generation commercial FPGA architectures and design tools simply do not provide adequate support for these types of applications. In this talk we will discuss the details of reconfigurable computing and FPGA architectures. I will present some of the architectural and CAD tool limitations that reconfigurable computing applications pose and discuss some solutions that I have developed: register-enhanced architectures, pipeline-aware timing-driven placement, and pipeline-aware routing.