Microsoft Research334 тыс
Опубликовано 17 августа 2016, 21:14
Parallel computing platforms such as chip multi-processors (CMPs) and graphics processors (GPUs) have become ubiquitous.This explosion in the availability of parallel computing resources signals a significant change: improving performance is less and less the responsibility of the architect or systems designer, and more and more the responsibility of the programmer. Ultimately, this change reflects a gamble that programmers will be able to make use of the available concurrency. Taking advantage of concurrency is hard, and current systems either limit performance or put the burden on the programmer. General purpose GPU (GPGPU) computing frameworks such as OpenCL and CUDA provide a familiar high-level programming language interface for writing programs that leverage GPUs, but impose a difficult tradeoff between abstractions and performance.Programmers face similar tradeoffs between performance and complexity when developing parallel programs for traditional CPU platforms like CMPs, where locks and threads remain the state-of-the-art. Coarse-grain locks are easy to reason about, but limit scalability, while fine-grain locks can achieve very good performance but are complex and difficult to maintain because of well-known difficulties such as deadlock. Transactional Memory (TM) is an abstraction that is free of these problems, and can deliver provide good performance at a lower cost in code complexity,eliminating the Hobson's choice between simplicity and scalability. In both GPU and CMP domains, the operating system can collaborate with the hardware to provide better abstractions for managing and exploiting concurrency. This talk motivates and quantifies the operating systems problems of supporting interactive applications that use GPUs.It also presents a full research prototype of operating system support for hardware transactional memory. In both GPU and CPU environments, the programmer can benefit significantly from the resulting abstractions.
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